Create Higher Resolution Displays with the VESA DSC Standard

As consumer demand for ultra-high-definition display products grows, designers are faced with many system design challenges associated with handling increased video throughput. The VESA Display Stream Compression (DSC) standard offers a compelling solution for enhancing display resolution up to 8K for a number of applications without having to compromise on display quality, battery life, or cost.

By Alain Legault and Emma-Jane Crozier

IN recent years, ultra-high-definition displays have become a key component of success for products across the consumer electronics industry. Users expect vibrant images and video, while manufacturers have seized the opportunity to differentiate their products through higher resolution displays.

The Need for Compression

Whether for a smartphone, a computer monitor, or a car infotainment system, almost all display interfaces send uncompressed pixel data from the graphics processor to the display using a serial interface (Fig. 1).

Fig. 1:  Data flow occurs between an application processor and a display module using uncompressed video. (MIPI Alliance = Mobile Industry Processor Interface Alliance. DDIC = display driver integrated circuit. DSI = display serial interface.)

As display resolutions have increased, so too has the amount of pixel data transferred across the serial transport interface. For example, a 4K mobile device at 60 frames per second requires a data rate of 16 gigabits per second (Gbps). Using the Mobile Industry Processor Interface (MIPI) display serial interface (DSI) physical layer (D-PHY) 1.2, a total of eight transmission lanes are required to transfer the video data.

The bandwidth needed to achieve higher resolutions has increased much faster than the serial interface speed used by video transport interfaces. While display resolutions have essentially doubled year after year, the serial interface speed has increased by only approximately 20% every year, resulting in a considerable gap (Fig. 2).

Fig. 2:  The display resolutions in devices, from wide extended graphics array (WXGA) to 5K and up, and the physical layers (PHY) used to transport the display information have not grown at the same compound annual growth rate (CAGR).

One possible solution to manage more pixel data would be to increase the number of serial lanes used in parallel. However, this would mean adding additional power, as well as increasing the number of pins and wires. For devices such as smartphones, this would seriously compromise battery life, as well as significantly increase overall system costs.

Another, better option is to use compression to handle the increased pixel data. By reducing the pixel data rate, compression alleviates pressure on transport links while keeping power consumption lower.

Figure 3 highlights in red the impact of compression for a 4K video stream such as WQUXGA on a mobile device using MIPI DSI transport. With a limit of eight lanes for the transmitter, it would not be possible using 1.5 Gbps per lane to develop a viable 4K product without compression. Using 2.5 Gbps per lane, eight lanes would be required. It would still be possible to develop a product, albeit with a considerable increase to overall development costs. With the addition of compression, it is now possible to develop a product with a 4K display using only four MIPI DSI lanes. Compression, therefore, presents a viable option for dealing with the challenge of designing higher resolution display products.

Fig. 3:  Based on a limit of eight lanes for the transmitter, it would not be possible to develop a viable 4K product without compression using 1.5 Gbps per lane. Compression allows for a 4K (or WQUXGA, as shown outlined in red) product using only 4 MIPI DSI lanes.

Background to VESA DSC

Having recognized the need for compression on display links, the Video Electronics Standards Association (VESA) first initiated efforts for a common, industry-wide compression standard in 2012, with the formation of the Display Stream Compression Task Group. A call for proposals in the industry was released in January 2013, with the objective of developing a compression standard that emphasized visually lossless picture quality, had a constant bit rate (CBR), offered the ability to update small regions of the image, supported many video formats (RGB, YCbCr 4:2:2, or 4:4:4; 8, 10, or 12 bits/component), and was easy and inexpensive to implement in real time. Six proposals were evaluated by the Display Stream Compression Task Group.¹ DSC was announced in the spring of 2014 and the v1.1 specification and C-model (a software representation of DSC used for verification and testing) were released in July 2014. The VESA Embedded DisplayPort (eDP) v1.4 and MIPI DSI v1.2 standards adopted DSC as a supported standard upon its release.

VESA DSC Algorithm

The VESA DSC algorithm is designed to compress video in real time for use in display transmission links with a CBR. The DSC algorithm is based on delta-pulse-code modulation (DPCM), and requires a single line of pixel storage; this enables extremely low latency performance results (of only a few microseconds). A rate buffer is also required. Figure 4 shows the DSC encoder block diagram.¹

Fig. 4:  This block diagram shows the main elements and data paths of the DSC encoder. These include the rate buffer, line buffers, the predictors, rate control feedback loop, VLC entropy coder, and the substream multiplexer. Source: VESA Display Stream Compression white paper.¹

There are multiple encoding tools included in the algorithm to ensure excellent visual performance for all types of content, including images, text, graphics, and complex test patterns (codec buster images). These encoding tools include the midpoint predictor (MPP), the block predictor (BP), the modified median adaptive predictor (MMAP), and indexed color history (ICH).

The VESA website states: “Compared to other image compression standards such as JPEG or AVC, etc., DSC achieves visually lossless compression quality at a low compression ratio by using a much simpler codec (coder/decoder) circuit. The typical compression ratio of DSC ranges from 1:1 to about 3:1, which offers significant benefit in interface data rate reduction. DSC is designed specifically to compress any content type at low compression with excellent results.”²

VESA DSC Developments Since its release in 2014, several important developments have further expanded the capabilities of DSC. VESA DSC version 1.2a was released by VESA in January 2016. Backward compatible with DSC 1.1, DSC 1.2a offers additional features that enable the standard to be used across a wider range of display applications, including higher resolution televisions and external display monitors of 4K and beyond. DSC 1.2a supports 14- and 16-bit color bit depth and offers native compression for 4:2:0 and 4:2:2 in the YCbCr color space, the video formats used in digital TVs. Another key feature is support for up to 16 bits per color component, versus the 8, 10, and 12 bits supported by DSC 1.1. The latest version of the DisplayPort standard (1.4), a digital display interface used for video transport between GPUs and computer monitors, was released in March 2016 and added support for VESA DSC 1.2a and forward error correction (FEC). As compressed video images can be affected by transmission errors, and even a single bit error can have a catastrophic impact on the visual experience, the Reed Solomon (254,250) FEC algorithm is used with DisplayPort 1.4 to improve the resiliency to link errors. The use of the Reed Solomon FEC substantially improves the bit error rate (BER) from 10-9 to 10-20, making transmission errors occur less than once a year instead of every few seconds. DisplayPort 1.4 maintains the link speed at 8.1 Gbps, but by using DSC with HBR3 transmission rates, it can support 8K UHD (7,680 × 4,320) at 60 Hz with 10-bit color and HDR, or 4K UHD (3,840 × 2,160) at 120 Hz with 10-bit color and HDR. Using DSC 1.2a with DisplayPort 1.4 also provides the ability to support multiple parallel streams over interleaved packets. Version 2.1 of the HDMI specification was announced in January 2017 and will include support for VESA DSC 1.2a.3

Testing and Performance

A series of rigorous tests was conducted by the DSC Task Group throughout the standard’s development process to guarantee the visually lossless performance of the DSC algorithm.

Participants were asked to compare a randomly chosen reference image with an encoded test image placed side by side to determine if it was possible to detect a difference between the two. According to VESA, “… the visual performance of DSC was evaluated through clinical testing by VESA in collaboration with member companies. The evaluation included a statistically significant number of observers who viewed many images over four image categories including artificial engineered images, text and graphics, such as street maps or different examples of printed material, people, landscape, animals and stills. Overall, observers completed nearly 250,000 subjective image comparisons. VESA members also concluded subjective testing as a far more robust method to verify visually lossless quality … .”² A complete overview of the subjective test methodology used by the task group is outlined in the 2015 article, “A new standard method of subjective assessment of barely visible image artifacts and a new public database: subjective analysis of image quality,” by David M. Hoffman and Dale Stolitzka in the Journal of the SID 22/15, 2015.

Based on the criteria defined by VESA prior to the development of DSC, the results of the testing confirmed the visually lossless picture quality of DSC for all types of images up to a compression factor of 3X.

Use Cases for VESA DSC

VESA Display Stream Compression was originally utilized by smartphone and tablet manufacturers; however, with the emergence of new display-based products, such as augmented- and virtual-reality (AR/VR) headsets, as well as display technology advances in areas such as the automotive industry, video compression is now being used across a wide range of applications. Whether it be the challenge of dealing with faster frame rates for AR/VR applications, or the simultaneous transport of multiple video sources for in-car video systems, DSC compression can be used to support higher resolution displays across a range of different applications. The following use case descriptions demonstrate the range of uses to which DSC can be successfully applied.

Compelling UHD Mobile Displays Without Sacrificing Battery Life and Cost

Since its release in 2014, VESA DSC has seen broad adoption from across the mobile industry. The NVIDIA Tegra X1 and the Qualcomm Snapdragon 820 are two examples of mobile processors currently making use of DSC 1.1.⁴

By adding a DSC encoder within the application processor and a DSC decoder within the display driver IC, it is possible to reduce the number of MIPI DSI TX and RX transport lanes needed, resulting in overall lower power consumption for the device (Fig. 5). It is also possible to reduce the size of the synchronous dynamic random access memory (SDRAM) frame buffer by the compression factor (e.g., 3X) if the images are stored in the compressed domain, enabling a reduction of overall system costs.

Fig. 5:  Using VESA DSC, it is possible to reduce the number of MIPI DSI TX and RX transport lanes and SDRAM memory needed.

Simultaneous Transport of Multiple Video Streams in Automotive Video Systems

Automotive electronics have evolved greatly in recent years, with considerable influence stemming from the growing trend of equipping vehicles with multiple displays at higher resolutions. Cars now contain multiple video sources for Advanced Driver Assistance Systems (ADAS), infotainment, climate control, side-view cameras, and driver navigation. As the number of video sources grows, so too does the challenge of processing and transporting video content around the vehicle. Manufacturers face high cabling costs and weight, peaked bandwidth, and increased electromagnetic interference (EMI) when developing systems containing multiple video streams inside cars.

In vehicles, several competing serial transport links are used to transport video, audio, and other telematic information over the local car network. These networks have a fixed bandwidth. The example in (Fig. 6) shows how DSC can be implemented with multiple video streams using an ethernet transport backbone.

Fig. 6:  By freeing up data bandwidth through compression, DSC enables more parallel video sources to be transported simultaneously over the same cabling.

With DSC compression, the data transport capacity is increased by up to 3X, enabling designers to use the existing physical interfaces in the vehicle with an increased number of displays at higher resolutions. By freeing up data bandwidth through compression, DSC enables more parallel video sources to be transported simultaneously over the same cabling, hence reducing the need for extra cabling and the potential expenses and weight associated with this.

Immersive High-Resolution Displays for AR/VR Products

Immersive, high-resolution displays form a key part of the experience offered by AR/VR products. Both AR and VR applications require high-resolution displays due to the proximity of headsets to the human eye; they also require very high frame rates for maximum fluidity (90 or 120 Hz), and minimal latency in order to avoid the potential motion sickness associated with the brain detecting small delays between the body’s physical movement and the image from the head-mounted device. In the quest to achieve higher resolution displays, manufacturers are often faced with many challenges, including power, footprint, and memory bandwidth considerations.

Figure 7 illustrates how DSC compression can be implemented between the application processors and micro-display driver ICs inside AR/VR head-mounted displays. By adding a DSC encoder at the image capture subsystem, a DSC encoder and decoder in the video/graphics processor, and a DSC decoder at the output, it is possible to increase the effective bandwidth capacity at every stage, reducing the overall shared memory bus bandwidth requirement, the number of SDRAMs, and hence the cost of materials and power consumption.

Fig. 7:  DSC compression can be implemented between the application processors and micro-display driver ICs inside AR/VR head-mounted displays.

DSC compression offers extremely low latency performance. With a delay of a few microseconds, the addition of DSC compression is not perceptible to the human eye.

8K Digital Televisions and Digital TV Products

The extended capabilities of DSC v1.2a opened up the potential for DSC compression to be used for digital TV applications, including UHD televisions and other associated digital TV products such as set-top boxes (STBs) and DVRs. By supporting 14- and 16-bit color bit depth (to display very high-color depth content), as well as adding native coding for 4:2:0 and 4:2:2 in the YCbCr color space (for more efficient compression), DSC 1.2a directly addresses the requirements of the digital TV market for developing HDR-compatible 8K televisions at high frame rates.

As shown in Fig. 8, DSC can be implemented within the television’s multimedia system-on-chip (SoC) processor and the TCON (timing controller). The bandwidth reduction offered by DSC eases the challenge of using long transmission lines between the SoC processor and the TCON on the back of the display panel. DSC helps to reduce EMC and signal integrity issues caused by the high-frequency challenges that usually come with designing ultra-high-resolution products.

Because DSC compression is scalable, super-high resolutions such as 8K @ 120Hz can be achieved with today’s semiconductor technology at an affordable price.

Fig. 8:  With support for up to 16 bits per color, compression with DSC 1.2a can be used to develop HDR-compatible 8K digital televisions.

USB Type-C Laptop and Extended Display Using DisplayPort Alternate Mode

The most recent USB Type-C compatible devices allow the use of a symmetrical reversible connector to provide all the I/O interfaces to and from the computers; this single cable can carry USB data, audio, and video information using DisplayPort Alternate or “Alt Mode,” as well as power delivery up to 100 W. USB Type-C offers a maximum data bandwidth of 32 Gbps. If this single interface were, for example, to be used with two external 4K desktop monitors (each with 16 Gbps of data bandwidth), there would not be a lot of data bandwidth left to carry other USB information; using compression to increase the amount of available bandwidth is, therefore, an interesting solution.

There are several possible implementations of DSC with USB Type-C. For example, DSC compression can be used in the DisplayPort transmitters inside the GPU source combined with a DSC decoder in the DisplayPort receiver directly inside a USB Type-C monitor, as shown in Fig. 9. The DSC decoder could also be incorporated inside a USB hub that would feed a standard DisplayPort monitor in uncompressed mode. In both scenarios, the data bandwidth saved through DSC compression can be used for other external resources such as storage and networking units.

Fig. 9:  DSC compression can be used with a DisplayPort transmitter inside a GPU, and combined with a DSC decoder in the DisplayPort receiver directly inside a USB Type-C monitor.

Compared to DisplayPort 1.3, the DisplayPort 1.4 standard takes advantage of VESA DSC v1.2 to increase the DisplayPort data transfer capacity without changing the link speed. With DSC’s video bandwidth reduction, DisplayPort 1.4 enables the transport of multiple ultra-high-definition video streams (using the multi-stream transport [MST] mode) across the single DisplayPort interface.

As resolutions of external displays move beyond 4K, DSC compression offers a solution for developing ultra-high-resolution external displays for use with the existing USB Type-C interface.

In conclusion, the VESA DSC algorithm offers a number of key benefits, including visually lossless compression quality with all types of content, bandwidth reductions of up to 3X, and ultra-low latency. Using DSC compression offers designers a scalable solution to meet the demands of current and future display products.

References

¹VESA Display Stream Compression by Frederick Walls and Sandy MacInnis, 2014 www.vesa.org/wp-content/uploads/2014/04/VESA_DSC-ETP200.pdf

²VESA website www.vesa.org/faqs/#DSCFAQs

³www.anandtech.com/show/11003/hdmi-21-announced-8kp60-48gbps-cable

⁴www.vesa.org/featured-articles/vesa-updates-display-stream-compression-standard-to-support-new-applications-and-richer-display-content/  •

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Alain Legault is VP of engineering at Hardent, a professional services firm providing engineering services, training solutions, and IP products. He can be reached at alegault@hardent.com. Emma-Jane Crozier is marketing & communications manager at Hardent. She can be reached at ejcrozier@hardent.com.